From 21bf44921fdbf20eaafac0385ddb6b2d5de24cbf Mon Sep 17 00:00:00 2001 From: John Poole Date: Thu, 19 Feb 2026 13:22:49 -0800 Subject: [PATCH] Adding modifications, but not the captured csv files --- ...onf.reticulum_915000000_sf8_bw125_CRC.json | 112 ++++++++++++++++ ....reticulum_915000000_sf8_bw125_NO_CRC.json | 112 ++++++++++++++++ .../global_conf.rxsingle.915_sf8_bw125.json | 70 ++++++++++ packet_forwarder/reset_lgw.sh | 122 ++++++++++++++++++ util_chip_id/reset_lgw.sh | 122 ++++++++++++++++++ util_chip_id/reset_lgw.sh.sysfs.bak | 93 +++++++++++++ util_net_downlink/reset_lgw.sh | 122 ++++++++++++++++++ 7 files changed, 753 insertions(+) create mode 100644 packet_forwarder/global_conf.reticulum_915000000_sf8_bw125_CRC.json create mode 100644 packet_forwarder/global_conf.reticulum_915000000_sf8_bw125_NO_CRC.json create mode 100644 packet_forwarder/global_conf.rxsingle.915_sf8_bw125.json create mode 100755 packet_forwarder/reset_lgw.sh create mode 100755 util_chip_id/reset_lgw.sh create mode 100755 util_chip_id/reset_lgw.sh.sysfs.bak create mode 100755 util_net_downlink/reset_lgw.sh diff --git a/packet_forwarder/global_conf.reticulum_915000000_sf8_bw125_CRC.json b/packet_forwarder/global_conf.reticulum_915000000_sf8_bw125_CRC.json new file mode 100644 index 0000000..5f7a0e2 --- /dev/null +++ b/packet_forwarder/global_conf.reticulum_915000000_sf8_bw125_CRC.json @@ -0,0 +1,112 @@ +{ + "SX130x_conf": { + "com_type": "SPI", + "com_path": "/dev/spidev0.0", + "lorawan_public": false, + "clksrc": 0, + "antenna_gain": 0, /* antenna gain, in dBi */ + "full_duplex": false, + "fine_timestamp": { + "enable": false, + "mode": "all_sf" /* high_capacity or all_sf */ + }, + "sx1261_conf": { + "spi_path": "/dev/spidev0.1", + "rssi_offset": 0, /* dB */ + "spectral_scan": { + "enable": false, + "freq_start": 903900000, + "nb_chan": 8, + "nb_scan": 2000, + "pace_s": 10 + }, + "lbt": { + "enable": false /* LBT for 500 Khz channels is not supported */ + } + }, + "radio_0": {"enable": true, + "type": "SX1250", + "freq": 915000000, + "rssi_offset": -215.4, + "rssi_tcomp": {"coeff_a": 0, "coeff_b": 0, "coeff_c": 20.41, "coeff_d": 2162.56, "coeff_e": 0}, + "tx_enable": true, + "tx_freq_min": 923000000, + "tx_freq_max": 928000000, + "tx_gain_lut":[ + {"rf_power": 12, "pa_gain": 0, "pwr_idx": 15}, + {"rf_power": 13, "pa_gain": 0, "pwr_idx": 16}, + {"rf_power": 14, "pa_gain": 0, "pwr_idx": 17}, + {"rf_power": 15, "pa_gain": 0, "pwr_idx": 19}, + {"rf_power": 16, "pa_gain": 0, "pwr_idx": 20}, + {"rf_power": 17, "pa_gain": 0, "pwr_idx": 22}, + {"rf_power": 18, "pa_gain": 1, "pwr_idx": 1}, + {"rf_power": 19, "pa_gain": 1, "pwr_idx": 2}, + {"rf_power": 20, "pa_gain": 1, "pwr_idx": 3}, + {"rf_power": 21, "pa_gain": 1, "pwr_idx": 4}, + {"rf_power": 22, "pa_gain": 1, "pwr_idx": 5}, + {"rf_power": 23, "pa_gain": 1, "pwr_idx": 6}, + {"rf_power": 24, "pa_gain": 1, "pwr_idx": 7}, + {"rf_power": 25, "pa_gain": 1, "pwr_idx": 9}, + {"rf_power": 26, "pa_gain": 1, "pwr_idx": 11}, + {"rf_power": 27, "pa_gain": 1, "pwr_idx": 14} + ] + }, + "radio_1": { + "enable": false, + "type": "SX1250", + "freq": 905000000, + "rssi_offset": -215.4, + "rssi_tcomp": {"coeff_a": 0, "coeff_b": 0, "coeff_c": 20.41, "coeff_d": 2162.56, "coeff_e": 0}, + "tx_enable": false + }, + "chan_multiSF_All": {"spreading_factor_enable": [ 8 ]}, + "chan_multiSF_0": {"enable": false, "radio": 0, "if": -400000}, /* Freq : 903.9 MHz*/ + "chan_multiSF_1": {"enable": false, "radio": 0, "if": -200000}, /* Freq : 904.1 MHz*/ + "chan_multiSF_2": {"enable": false, "radio": 0, "if": 0}, /* Freq : 904.3 MHz*/ + "chan_multiSF_3": {"enable": false, "radio": 0, "if": 200000}, /* Freq : 904.5 MHz*/ + "chan_multiSF_4": {"enable": false, "radio": 1, "if": -300000}, /* Freq : 904.7 MHz*/ + "chan_multiSF_5": {"enable": false, "radio": 1, "if": -100000}, /* Freq : 904.9 MHz*/ + "chan_multiSF_6": {"enable": false, "radio": 1, "if": 100000}, /* Freq : 905.1 MHz*/ + "chan_multiSF_7": {"enable": false, "radio": 1, "if": 300000}, /* Freq : 905.3 MHz*/ + "chan_Lora_std": {"enable": true, "radio": 0, "if": 0, "bandwidth": 125000, "spread_factor": 8, + "implicit_hdr": false, "implicit_payload_length": 0, "implicit_crc_en": false, "implicit_coderate": 1}, + "chan_FSK": {"enable": false, "radio": 1, "if": 300000, "bandwidth": 125000, "datarate": 50000} /* Freq : 868.8 MHz*/ + }, + + "gateway_conf": { + "gateway_ID": "AA555A0000000000", + /* change with default server address/ports */ + "server_address": "localhost", + "serv_port_up": 1730, + "serv_port_down": 1730, + /* adjust the following parameters for your network */ + "keepalive_interval": 10, + "stat_interval": 30, + "push_timeout_ms": 100, + /* forward only valid packets */ + "forward_crc_valid": true, + "forward_crc_error": false, + "forward_crc_disabled": false, + /* GPS configuration */ + "gps_tty_path": "/dev/ttyS0", + /* GPS reference coordinates */ + "ref_latitude": 0.0, + "ref_longitude": 0.0, + "ref_altitude": 0, + /* Beaconing parameters */ + "beacon_period": 0, /* disable class B beacon */ + "beacon_freq_hz": 869525000, + "beacon_datarate": 9, + "beacon_bw_hz": 125000, + "beacon_power": 14, + "beacon_infodesc": 0 + }, + + "debug_conf": { + "ref_payload":[ + {"id": "0xCAFE1234"}, + {"id": "0xCAFE2345"} + ], + "log_file": "loragw_hal.log" + } +} diff --git a/packet_forwarder/global_conf.reticulum_915000000_sf8_bw125_NO_CRC.json b/packet_forwarder/global_conf.reticulum_915000000_sf8_bw125_NO_CRC.json new file mode 100644 index 0000000..41e3db9 --- /dev/null +++ b/packet_forwarder/global_conf.reticulum_915000000_sf8_bw125_NO_CRC.json @@ -0,0 +1,112 @@ +{ + "SX130x_conf": { + "com_type": "SPI", + "com_path": "/dev/spidev0.0", + "lorawan_public": false, + "clksrc": 0, + "antenna_gain": 0, /* antenna gain, in dBi */ + "full_duplex": false, + "fine_timestamp": { + "enable": false, + "mode": "all_sf" /* high_capacity or all_sf */ + }, + "sx1261_conf": { + "spi_path": "/dev/spidev0.1", + "rssi_offset": 0, /* dB */ + "spectral_scan": { + "enable": false, + "freq_start": 903900000, + "nb_chan": 8, + "nb_scan": 2000, + "pace_s": 10 + }, + "lbt": { + "enable": false /* LBT for 500 Khz channels is not supported */ + } + }, + "radio_0": {"enable": true, + "type": "SX1250", + "freq": 915000000, + "rssi_offset": -215.4, + "rssi_tcomp": {"coeff_a": 0, "coeff_b": 0, "coeff_c": 20.41, "coeff_d": 2162.56, "coeff_e": 0}, + "tx_enable": true, + "tx_freq_min": 923000000, + "tx_freq_max": 928000000, + "tx_gain_lut":[ + {"rf_power": 12, "pa_gain": 0, "pwr_idx": 15}, + {"rf_power": 13, "pa_gain": 0, "pwr_idx": 16}, + {"rf_power": 14, "pa_gain": 0, "pwr_idx": 17}, + {"rf_power": 15, "pa_gain": 0, "pwr_idx": 19}, + {"rf_power": 16, "pa_gain": 0, "pwr_idx": 20}, + {"rf_power": 17, "pa_gain": 0, "pwr_idx": 22}, + {"rf_power": 18, "pa_gain": 1, "pwr_idx": 1}, + {"rf_power": 19, "pa_gain": 1, "pwr_idx": 2}, + {"rf_power": 20, "pa_gain": 1, "pwr_idx": 3}, + {"rf_power": 21, "pa_gain": 1, "pwr_idx": 4}, + {"rf_power": 22, "pa_gain": 1, "pwr_idx": 5}, + {"rf_power": 23, "pa_gain": 1, "pwr_idx": 6}, + {"rf_power": 24, "pa_gain": 1, "pwr_idx": 7}, + {"rf_power": 25, "pa_gain": 1, "pwr_idx": 9}, + {"rf_power": 26, "pa_gain": 1, "pwr_idx": 11}, + {"rf_power": 27, "pa_gain": 1, "pwr_idx": 14} + ] + }, + "radio_1": { + "enable": false, + "type": "SX1250", + "freq": 905000000, + "rssi_offset": -215.4, + "rssi_tcomp": {"coeff_a": 0, "coeff_b": 0, "coeff_c": 20.41, "coeff_d": 2162.56, "coeff_e": 0}, + "tx_enable": false + }, + "chan_multiSF_All": {"spreading_factor_enable": [ 7 ]}, + "chan_multiSF_0": {"enable": false, "radio": 0, "if": -400000}, /* Freq : 903.9 MHz*/ + "chan_multiSF_1": {"enable": false, "radio": 0, "if": -200000}, /* Freq : 904.1 MHz*/ + "chan_multiSF_2": {"enable": false, "radio": 0, "if": 0}, /* Freq : 904.3 MHz*/ + "chan_multiSF_3": {"enable": false, "radio": 0, "if": 200000}, /* Freq : 904.5 MHz*/ + "chan_multiSF_4": {"enable": false, "radio": 1, "if": -300000}, /* Freq : 904.7 MHz*/ + "chan_multiSF_5": {"enable": false, "radio": 1, "if": -100000}, /* Freq : 904.9 MHz*/ + "chan_multiSF_6": {"enable": false, "radio": 1, "if": 100000}, /* Freq : 905.1 MHz*/ + "chan_multiSF_7": {"enable": false, "radio": 1, "if": 300000}, /* Freq : 905.3 MHz*/ + "chan_Lora_std": {"enable": true, "radio": 0, "if": 0, "bandwidth": 125000, "spread_factor": 7, + "implicit_hdr": false, "implicit_payload_length": 0, "implicit_crc_en": false, "implicit_coderate": 1}, + "chan_FSK": {"enable": false, "radio": 1, "if": 300000, "bandwidth": 125000, "datarate": 50000} /* Freq : 868.8 MHz*/ + }, + + "gateway_conf": { + "gateway_ID": "AA555A0000000000", + /* change with default server address/ports */ + "server_address": "localhost", + "serv_port_up": 1730, + "serv_port_down": 1730, + /* adjust the following parameters for your network */ + "keepalive_interval": 10, + "stat_interval": 30, + "push_timeout_ms": 100, + /* forward only valid packets */ + "forward_crc_valid": true, + "forward_crc_error": false, + "forward_crc_disabled": false, + /* GPS configuration */ + "gps_tty_path": "/dev/ttyS0", + /* GPS reference coordinates */ + "ref_latitude": 0.0, + "ref_longitude": 0.0, + "ref_altitude": 0, + /* Beaconing parameters */ + "beacon_period": 0, /* disable class B beacon */ + "beacon_freq_hz": 869525000, + "beacon_datarate": 9, + "beacon_bw_hz": 125000, + "beacon_power": 14, + "beacon_infodesc": 0 + }, + + "debug_conf": { + "ref_payload":[ + {"id": "0xCAFE1234"}, + {"id": "0xCAFE2345"} + ], + "log_file": "loragw_hal.log" + } +} diff --git a/packet_forwarder/global_conf.rxsingle.915_sf8_bw125.json b/packet_forwarder/global_conf.rxsingle.915_sf8_bw125.json new file mode 100644 index 0000000..eb50106 --- /dev/null +++ b/packet_forwarder/global_conf.rxsingle.915_sf8_bw125.json @@ -0,0 +1,70 @@ +{ + "SX130x_conf": { + "com_type": "SPI", + "com_path": "/dev/spidev0.0", + + "lorawan_public": false, + "clksrc": 0, + "antenna_gain": 0, + "full_duplex": false, + + "sx1261_conf": { + "spi_path": "/dev/spidev0.1", + "rssi_offset": 0, + "spectral_scan": { "enable": false, "freq_start": 903900000, "nb_chan": 8, "nb_scan": 2000, "pace_s": 10 }, + "lbt": { "enable": false } + }, + + "radio_0": { + "enable": true, + "type": "SX1250", + "freq": 915000000, + "rssi_offset": -215.4, + "tx_enable": false + }, + + "radio_1": { + "enable": false, + "type": "SX1250", + "freq": 0, + "rssi_offset": -215.4, + "tx_enable": false + }, + + "chan_multiSF_All": { "spreading_factor_enable": [ 8 ] }, + + "chan_Lora_std": { + "enable": true, + "radio": 0, + "if": 0, + "bandwidth": 125000, + "spread_factor": 8, + "implicit_hdr": false, + "implicit_payload_length": 0, + "implicit_crc_en": false, + "implicit_coderate": 1 + }, + + "chan_FSK": { "enable": false, "radio": 0, "if": 0, "bandwidth": 125000, "datarate": 50000 } + }, + + "gateway_conf": { + "gateway_ID": "AA555A0000000000", + "server_address": "127.0.0.1", + "serv_port_up": 1730, + "serv_port_down": 1730, + "keepalive_interval": 10, + "stat_interval": 30, + "push_timeout_ms": 100, + "forward_crc_valid": true, + "forward_crc_error": false, + "forward_crc_disabled": false, + "gps_tty_path": "/dev/ttyS0", + "ref_latitude": 0.0, + "ref_longitude": 0.0, + "ref_altitude": 0, + "beacon_period": 0 + }, + + "debug_conf": { "log_file": "loragw_hal.log" } +} diff --git a/packet_forwarder/reset_lgw.sh b/packet_forwarder/reset_lgw.sh new file mode 100755 index 0000000..0e9d859 --- /dev/null +++ b/packet_forwarder/reset_lgw.sh @@ -0,0 +1,122 @@ +#!/bin/sh +# +# reset_lgw.sh (libgpiod version) +# Replaces legacy /sys/class/gpio export/direction/value usage. +# +# Usage: +# ./reset_lgw.sh start +# ./reset_lgw.sh stop +# +# Environment override: +# GPIOCHIP=gpiochip0 ./reset_lgw.sh start +# + +set -eu + +# --- GPIO mapping (BCM numbers) --- +SX1302_RESET_PIN=23 # SX1302 reset +SX1302_POWER_EN_PIN=18 # SX1302 power enable +SX1261_RESET_PIN=22 # SX1261 reset (LBT / Spectral Scan) +AD5338R_RESET_PIN=13 # AD5338R reset (reference design; may be unused on your HAT) + +CHIP="${GPIOCHIP:-gpiochip0}" + +# Small sleeps to let rails settle +WAIT() { sleep 0.10; } + +# gpioset helper: +# libgpiod v1.x: gpioset defaults to holding the line until the process exits. +# Using "-m time -s " makes it deterministic for pulses. +#SET_FOR() { +# # $1=line $2=value $3=seconds +# /usr/sbin/gpioset -m time -s "$3" "$CHIP" "$1=$2" >/dev/null 2>&1 || { +# echo "ERROR: gpioset failed on $CHIP line $1=$2 (check chip name/permissions)" >&2 +# exit 1 +# } +#} +# +#SET_HOLD() { +# # Hold briefly but long enough for power enable +# # Using time mode too, so we don't leave lines requested forever. +# /usr/sbin/gpioset -m time -s 1.0 "$CHIP" "$1=$2" >/dev/null 2>&1 || { +# echo "ERROR: gpioset failed on $CHIP line $1=$2" >&2 +# exit 1 +# } +#} + +SET_FOR_USEC() { + # $1=line $2=value $3=usec + /usr/sbin/gpioset --mode=time --usec "$3" "$CHIP" "$1=$2" >/dev/null 2>&1 || { + echo "ERROR: gpioset failed on $CHIP line $1=$2" >&2 + exit 1 + } +} + +SET_FOR_SEC() { + # $1=line $2=value $3=sec (integer) + /usr/sbin/gpioset --mode=time --sec "$3" "$CHIP" "$1=$2" >/dev/null 2>&1 || { + echo "ERROR: gpioset failed on $CHIP line $1=$2" >&2 + exit 1 + } +} +reset() { + echo "CoreCell power enable through ${CHIP} line ${SX1302_POWER_EN_PIN}..." + echo "CoreCell reset through ${CHIP} line ${SX1302_RESET_PIN}..." + echo "SX1261 reset through ${CHIP} line ${SX1261_RESET_PIN}..." + echo "ADC reset through ${CHIP} line ${AD5338R_RESET_PIN}..." + +# # Power enable ON (hold long enough to cover the reset sequence) +# SET_HOLD "$SX1302_POWER_EN_PIN" 1 +# WAIT +# +# # SX1302 reset pulse (many designs are active-low; this matches Semtech script) +# SET_FOR "$SX1302_RESET_PIN" 1 0.10 +# SET_FOR "$SX1302_RESET_PIN" 0 0.10 +# WAIT +# +# # SX1261 reset pulse +# SET_FOR "$SX1261_RESET_PIN" 0 0.10 +# SET_FOR "$SX1261_RESET_PIN" 1 0.10 +# WAIT +# +# # Optional ADC reset pulse (harmless if line is unused, but may error if not present) +# # If this line causes failure on your HAT, set AD5338R_RESET_PIN to an unused line +# # or comment these two lines out. +# SET_FOR "$AD5338R_RESET_PIN" 0 0.10 +# SET_FOR "$AD5338R_RESET_PIN" 1 0.10 +# WAIT + +# +# 2/18/26 8:17 AM below replaces above +# +# Power enable ON for 1 second (enough to cover reset sequencing) +SET_FOR_SEC "$SX1302_POWER_EN_PIN" 1 1 +WAIT + +# SX1302 reset pulse (100ms high then 100ms low) +SET_FOR_USEC "$SX1302_RESET_PIN" 1 100000 +SET_FOR_USEC "$SX1302_RESET_PIN" 0 100000 +WAIT + +# SX1261 reset pulse (100ms low then 100ms high) +SET_FOR_USEC "$SX1261_RESET_PIN" 0 100000 +SET_FOR_USEC "$SX1261_RESET_PIN" 1 100000 +WAIT + +# ADC reset pulse (often unused on HATs; safe to try, but you can comment out if needed) +SET_FOR_USEC "$AD5338R_RESET_PIN" 0 100000 +SET_FOR_USEC "$AD5338R_RESET_PIN" 1 100000 +WAIT + +} + +case "${1:-}" in + start) reset ;; + stop) reset ;; + *) + echo "Usage: $0 {start|stop}" >&2 + exit 1 + ;; +esac + +exit 0 diff --git a/util_chip_id/reset_lgw.sh b/util_chip_id/reset_lgw.sh new file mode 100755 index 0000000..0e9d859 --- /dev/null +++ b/util_chip_id/reset_lgw.sh @@ -0,0 +1,122 @@ +#!/bin/sh +# +# reset_lgw.sh (libgpiod version) +# Replaces legacy /sys/class/gpio export/direction/value usage. +# +# Usage: +# ./reset_lgw.sh start +# ./reset_lgw.sh stop +# +# Environment override: +# GPIOCHIP=gpiochip0 ./reset_lgw.sh start +# + +set -eu + +# --- GPIO mapping (BCM numbers) --- +SX1302_RESET_PIN=23 # SX1302 reset +SX1302_POWER_EN_PIN=18 # SX1302 power enable +SX1261_RESET_PIN=22 # SX1261 reset (LBT / Spectral Scan) +AD5338R_RESET_PIN=13 # AD5338R reset (reference design; may be unused on your HAT) + +CHIP="${GPIOCHIP:-gpiochip0}" + +# Small sleeps to let rails settle +WAIT() { sleep 0.10; } + +# gpioset helper: +# libgpiod v1.x: gpioset defaults to holding the line until the process exits. +# Using "-m time -s " makes it deterministic for pulses. +#SET_FOR() { +# # $1=line $2=value $3=seconds +# /usr/sbin/gpioset -m time -s "$3" "$CHIP" "$1=$2" >/dev/null 2>&1 || { +# echo "ERROR: gpioset failed on $CHIP line $1=$2 (check chip name/permissions)" >&2 +# exit 1 +# } +#} +# +#SET_HOLD() { +# # Hold briefly but long enough for power enable +# # Using time mode too, so we don't leave lines requested forever. +# /usr/sbin/gpioset -m time -s 1.0 "$CHIP" "$1=$2" >/dev/null 2>&1 || { +# echo "ERROR: gpioset failed on $CHIP line $1=$2" >&2 +# exit 1 +# } +#} + +SET_FOR_USEC() { + # $1=line $2=value $3=usec + /usr/sbin/gpioset --mode=time --usec "$3" "$CHIP" "$1=$2" >/dev/null 2>&1 || { + echo "ERROR: gpioset failed on $CHIP line $1=$2" >&2 + exit 1 + } +} + +SET_FOR_SEC() { + # $1=line $2=value $3=sec (integer) + /usr/sbin/gpioset --mode=time --sec "$3" "$CHIP" "$1=$2" >/dev/null 2>&1 || { + echo "ERROR: gpioset failed on $CHIP line $1=$2" >&2 + exit 1 + } +} +reset() { + echo "CoreCell power enable through ${CHIP} line ${SX1302_POWER_EN_PIN}..." + echo "CoreCell reset through ${CHIP} line ${SX1302_RESET_PIN}..." + echo "SX1261 reset through ${CHIP} line ${SX1261_RESET_PIN}..." + echo "ADC reset through ${CHIP} line ${AD5338R_RESET_PIN}..." + +# # Power enable ON (hold long enough to cover the reset sequence) +# SET_HOLD "$SX1302_POWER_EN_PIN" 1 +# WAIT +# +# # SX1302 reset pulse (many designs are active-low; this matches Semtech script) +# SET_FOR "$SX1302_RESET_PIN" 1 0.10 +# SET_FOR "$SX1302_RESET_PIN" 0 0.10 +# WAIT +# +# # SX1261 reset pulse +# SET_FOR "$SX1261_RESET_PIN" 0 0.10 +# SET_FOR "$SX1261_RESET_PIN" 1 0.10 +# WAIT +# +# # Optional ADC reset pulse (harmless if line is unused, but may error if not present) +# # If this line causes failure on your HAT, set AD5338R_RESET_PIN to an unused line +# # or comment these two lines out. +# SET_FOR "$AD5338R_RESET_PIN" 0 0.10 +# SET_FOR "$AD5338R_RESET_PIN" 1 0.10 +# WAIT + +# +# 2/18/26 8:17 AM below replaces above +# +# Power enable ON for 1 second (enough to cover reset sequencing) +SET_FOR_SEC "$SX1302_POWER_EN_PIN" 1 1 +WAIT + +# SX1302 reset pulse (100ms high then 100ms low) +SET_FOR_USEC "$SX1302_RESET_PIN" 1 100000 +SET_FOR_USEC "$SX1302_RESET_PIN" 0 100000 +WAIT + +# SX1261 reset pulse (100ms low then 100ms high) +SET_FOR_USEC "$SX1261_RESET_PIN" 0 100000 +SET_FOR_USEC "$SX1261_RESET_PIN" 1 100000 +WAIT + +# ADC reset pulse (often unused on HATs; safe to try, but you can comment out if needed) +SET_FOR_USEC "$AD5338R_RESET_PIN" 0 100000 +SET_FOR_USEC "$AD5338R_RESET_PIN" 1 100000 +WAIT + +} + +case "${1:-}" in + start) reset ;; + stop) reset ;; + *) + echo "Usage: $0 {start|stop}" >&2 + exit 1 + ;; +esac + +exit 0 diff --git a/util_chip_id/reset_lgw.sh.sysfs.bak b/util_chip_id/reset_lgw.sh.sysfs.bak new file mode 100755 index 0000000..b58f0e9 --- /dev/null +++ b/util_chip_id/reset_lgw.sh.sysfs.bak @@ -0,0 +1,93 @@ +#!/bin/sh + +# This script is intended to be used on SX1302 CoreCell platform, it performs +# the following actions: +# - export/unpexort GPIO23 and GPIO18 used to reset the SX1302 chip and to enable the LDOs +# - export/unexport GPIO22 used to reset the optional SX1261 radio used for LBT/Spectral Scan +# +# Usage examples: +# ./reset_lgw.sh stop +# ./reset_lgw.sh start + +# GPIO mapping has to be adapted with HW +# + +SX1302_RESET_PIN=23 # SX1302 reset +SX1302_POWER_EN_PIN=18 # SX1302 power enable +SX1261_RESET_PIN=22 # SX1261 reset (LBT / Spectral Scan) +AD5338R_RESET_PIN=13 # AD5338R reset (full-duplex CN490 reference design) + +WAIT_GPIO() { + sleep 0.1 +} + +init() { + # setup GPIOs + echo "$SX1302_RESET_PIN" > /sys/class/gpio/export; WAIT_GPIO + echo "$SX1261_RESET_PIN" > /sys/class/gpio/export; WAIT_GPIO + echo "$SX1302_POWER_EN_PIN" > /sys/class/gpio/export; WAIT_GPIO + echo "$AD5338R_RESET_PIN" > /sys/class/gpio/export; WAIT_GPIO + + # set GPIOs as output + echo "out" > /sys/class/gpio/gpio$SX1302_RESET_PIN/direction; WAIT_GPIO + echo "out" > /sys/class/gpio/gpio$SX1261_RESET_PIN/direction; WAIT_GPIO + echo "out" > /sys/class/gpio/gpio$SX1302_POWER_EN_PIN/direction; WAIT_GPIO + echo "out" > /sys/class/gpio/gpio$AD5338R_RESET_PIN/direction; WAIT_GPIO +} + +reset() { + echo "CoreCell reset through GPIO$SX1302_RESET_PIN..." + echo "SX1261 reset through GPIO$SX1302_RESET_PIN..." + echo "CoreCell power enable through GPIO$SX1302_POWER_EN_PIN..." + echo "CoreCell ADC reset through GPIO$AD5338R_RESET_PIN..." + + # write output for SX1302 CoreCell power_enable and reset + echo "1" > /sys/class/gpio/gpio$SX1302_POWER_EN_PIN/value; WAIT_GPIO + + echo "1" > /sys/class/gpio/gpio$SX1302_RESET_PIN/value; WAIT_GPIO + echo "0" > /sys/class/gpio/gpio$SX1302_RESET_PIN/value; WAIT_GPIO + + echo "0" > /sys/class/gpio/gpio$SX1261_RESET_PIN/value; WAIT_GPIO + echo "1" > /sys/class/gpio/gpio$SX1261_RESET_PIN/value; WAIT_GPIO + + echo "0" > /sys/class/gpio/gpio$AD5338R_RESET_PIN/value; WAIT_GPIO + echo "1" > /sys/class/gpio/gpio$AD5338R_RESET_PIN/value; WAIT_GPIO +} + +term() { + # cleanup all GPIOs + if [ -d /sys/class/gpio/gpio$SX1302_RESET_PIN ] + then + echo "$SX1302_RESET_PIN" > /sys/class/gpio/unexport; WAIT_GPIO + fi + if [ -d /sys/class/gpio/gpio$SX1261_RESET_PIN ] + then + echo "$SX1261_RESET_PIN" > /sys/class/gpio/unexport; WAIT_GPIO + fi + if [ -d /sys/class/gpio/gpio$SX1302_POWER_EN_PIN ] + then + echo "$SX1302_POWER_EN_PIN" > /sys/class/gpio/unexport; WAIT_GPIO + fi + if [ -d /sys/class/gpio/gpio$AD5338R_RESET_PIN ] + then + echo "$AD5338R_RESET_PIN" > /sys/class/gpio/unexport; WAIT_GPIO + fi +} + +case "$1" in + start) + term # just in case + init + reset + ;; + stop) + reset + term + ;; + *) + echo "Usage: $0 {start|stop}" + exit 1 + ;; +esac + +exit 0 \ No newline at end of file diff --git a/util_net_downlink/reset_lgw.sh b/util_net_downlink/reset_lgw.sh new file mode 100755 index 0000000..0e9d859 --- /dev/null +++ b/util_net_downlink/reset_lgw.sh @@ -0,0 +1,122 @@ +#!/bin/sh +# +# reset_lgw.sh (libgpiod version) +# Replaces legacy /sys/class/gpio export/direction/value usage. +# +# Usage: +# ./reset_lgw.sh start +# ./reset_lgw.sh stop +# +# Environment override: +# GPIOCHIP=gpiochip0 ./reset_lgw.sh start +# + +set -eu + +# --- GPIO mapping (BCM numbers) --- +SX1302_RESET_PIN=23 # SX1302 reset +SX1302_POWER_EN_PIN=18 # SX1302 power enable +SX1261_RESET_PIN=22 # SX1261 reset (LBT / Spectral Scan) +AD5338R_RESET_PIN=13 # AD5338R reset (reference design; may be unused on your HAT) + +CHIP="${GPIOCHIP:-gpiochip0}" + +# Small sleeps to let rails settle +WAIT() { sleep 0.10; } + +# gpioset helper: +# libgpiod v1.x: gpioset defaults to holding the line until the process exits. +# Using "-m time -s " makes it deterministic for pulses. +#SET_FOR() { +# # $1=line $2=value $3=seconds +# /usr/sbin/gpioset -m time -s "$3" "$CHIP" "$1=$2" >/dev/null 2>&1 || { +# echo "ERROR: gpioset failed on $CHIP line $1=$2 (check chip name/permissions)" >&2 +# exit 1 +# } +#} +# +#SET_HOLD() { +# # Hold briefly but long enough for power enable +# # Using time mode too, so we don't leave lines requested forever. +# /usr/sbin/gpioset -m time -s 1.0 "$CHIP" "$1=$2" >/dev/null 2>&1 || { +# echo "ERROR: gpioset failed on $CHIP line $1=$2" >&2 +# exit 1 +# } +#} + +SET_FOR_USEC() { + # $1=line $2=value $3=usec + /usr/sbin/gpioset --mode=time --usec "$3" "$CHIP" "$1=$2" >/dev/null 2>&1 || { + echo "ERROR: gpioset failed on $CHIP line $1=$2" >&2 + exit 1 + } +} + +SET_FOR_SEC() { + # $1=line $2=value $3=sec (integer) + /usr/sbin/gpioset --mode=time --sec "$3" "$CHIP" "$1=$2" >/dev/null 2>&1 || { + echo "ERROR: gpioset failed on $CHIP line $1=$2" >&2 + exit 1 + } +} +reset() { + echo "CoreCell power enable through ${CHIP} line ${SX1302_POWER_EN_PIN}..." + echo "CoreCell reset through ${CHIP} line ${SX1302_RESET_PIN}..." + echo "SX1261 reset through ${CHIP} line ${SX1261_RESET_PIN}..." + echo "ADC reset through ${CHIP} line ${AD5338R_RESET_PIN}..." + +# # Power enable ON (hold long enough to cover the reset sequence) +# SET_HOLD "$SX1302_POWER_EN_PIN" 1 +# WAIT +# +# # SX1302 reset pulse (many designs are active-low; this matches Semtech script) +# SET_FOR "$SX1302_RESET_PIN" 1 0.10 +# SET_FOR "$SX1302_RESET_PIN" 0 0.10 +# WAIT +# +# # SX1261 reset pulse +# SET_FOR "$SX1261_RESET_PIN" 0 0.10 +# SET_FOR "$SX1261_RESET_PIN" 1 0.10 +# WAIT +# +# # Optional ADC reset pulse (harmless if line is unused, but may error if not present) +# # If this line causes failure on your HAT, set AD5338R_RESET_PIN to an unused line +# # or comment these two lines out. +# SET_FOR "$AD5338R_RESET_PIN" 0 0.10 +# SET_FOR "$AD5338R_RESET_PIN" 1 0.10 +# WAIT + +# +# 2/18/26 8:17 AM below replaces above +# +# Power enable ON for 1 second (enough to cover reset sequencing) +SET_FOR_SEC "$SX1302_POWER_EN_PIN" 1 1 +WAIT + +# SX1302 reset pulse (100ms high then 100ms low) +SET_FOR_USEC "$SX1302_RESET_PIN" 1 100000 +SET_FOR_USEC "$SX1302_RESET_PIN" 0 100000 +WAIT + +# SX1261 reset pulse (100ms low then 100ms high) +SET_FOR_USEC "$SX1261_RESET_PIN" 0 100000 +SET_FOR_USEC "$SX1261_RESET_PIN" 1 100000 +WAIT + +# ADC reset pulse (often unused on HATs; safe to try, but you can comment out if needed) +SET_FOR_USEC "$AD5338R_RESET_PIN" 0 100000 +SET_FOR_USEC "$AD5338R_RESET_PIN" 1 100000 +WAIT + +} + +case "${1:-}" in + start) reset ;; + stop) reset ;; + *) + echo "Usage: $0 {start|stop}" >&2 + exit 1 + ;; +esac + +exit 0